I find this quite interesting in regard of a FPGA controlled robot. Actually to build a simple FPGA we only need a parallel SRAM or EEPROM. We use the address lines as inputs and the data lines as output. Any combination of input logic states will be interpreted as an address, which the memory will look up and provide on the data outputs. By programming the memory (for example via DIP switches) with the state tables for the functions we want to compute, we can create a very complex behaviour of the robot, without using any micro controller.